PhD Forum Best Presentation Awards
supported by EDAA, ACM Sigda & IEEE CEDA

Alireza Mahzoon, University of Bremen, DE

is awarded for the presentation

Proving Correctness of Industrial Multipliers using Symbolic Computer Algebra

 

Behnaz Pourmohseni, Friedrich Alexander Universität Erlangen Nürnberg (FAU), DE

is awarded for the work

System-Level Mapping, Analysis, and Management of Real-Time Applications in Many-Core Systems

2020 EDAA Achievement Award

The 2020 EDAA Achievement Award ceremony by Norbert Wehn starts in the video below.

Luca Benini, ETHZ, Switzerland

https://www.edaa.com/press_releases/PR_achievement_2020_results.pdf

EDAA Outstanding Dissertations Award 2019

The EDAA Outstanding Dissertations Award 2019 ceremony by Lorena Anghel starts in the video below.

Topic 1

Eric Schneider, Ph.D

Multi-Level Simulation of Nano-Electronic Digital Circuits on GPUs

Topic 2

Fabio Passos, Ph.D.

A Multilevel Approach to the Systematic Design of Radio-Frequency Integrated Circuits

Topic 3

Ahmedullah Aziz, Ph.D.

Device-Circuit Co-design Employing Phase Transition Materials for Low Power Electronics

Topic 4

Innocent Agbo, Ph.D.

Reliability Modeling and Mitigation for Embedded Memories

Topic 5 (Quantum Computing Systems):

Alwin Zulehner, Ph.D.

Design Automation for Quantum Computing

https://www.edaa.com/press_releases/EDAA_Award_2019_Results.pdf

DATE Fellow Award

The DATE Fellow Award ceremony by Norbert Wehn starts in the video below at minute 2:50.

Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE

IEEE CS TTTC Outstanding Contribution Award

Jan Madsen, Technical University of Denmark, DK
Giorgio Di Natale, CNRS/TIMA, FR

DATE Best Paper Awards 2020

The Best Paper Award ceremony by Cristiana Bolchini during her opening talk video below starts at minute 2:05.

Each year the Design, Automation and Test in Europe Conference presents awards to the authors of the best papers. The selection is performed by the award committee composed of the Track Chairs Cristiana Bolchini, Theocharis Theocharides, Jaume Abella and Valeria Bertacco and the following members: Borzoo Bonakdarpour, Andrea Calimera, Ramon Canal, Luca Carloni, Alessandro Cimatti, Ayse Coskun, Nikil Dutt, Ioannis Papaefstathiou, Dionisios Pnevmatikatos, Davide Quaglia, Muhammad Shafique, Olivier Sentieys, Luis Miguel Silveira, Juergen Teich, Vasileios Tenentes, Jerzy Tyszer, Arnaud Virazel.

D Track

Impact of Magnetic Coupling and Density on STT-MRAM Performance

Lizhou Wu¹, Siddharth Rao², Mottaqiallah Taouil¹, Erik Jan Marinissen², Gouri Sankar Kar² and Said Hamdioui¹

¹TU Delft, NL; ²IMEC, BE

A Track

A Flexible and Scalable NTT Hardware: Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography

Ahmet Can Mert¹, Emre Karabulut², Erdinc Ozturk¹, Erkay Savas¹, Michela Becchi² and Aydin Aysu²

¹Sabanci University, TR; ²North Carolina State University, US

T Track

DEFCON: Generating and Detecting Failure-prone Instruction Sequences via Stochastic Search

Ioannis Tsiokanos¹, Lev Mukhanov¹, Giorgis Georgakoudis², Dimitrios S. Nikolopoulos³ and Georgios Karakonstantis¹

¹Queen's University Belfast, GB; ²Lawrence Livermore National Laboratory, US; ³Virginia Tech, US

E Track

Statistical Time-based Intrusion Detection in Embedded Systems

Nadir Carreon Rascon, Allison Gilbreath and Roman Lysecky

University of Arizona, US

Best Paper Award Nominations

D Track

Fast and Accurate DRAM Simulation: Can we Further Accelerate it?

Johannes Feldmann¹; Matthias Jung²; Kira Kraft¹; Lukas Steiner¹; Norbert Wehn¹

¹TU Kaiserslautern, ²Fraunhofer IESE

ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning

Davide Giri; Kuan-Lin Chiu; Giuseppe Di Guglielmo; Paolo Mantovani; Luca Carloni

Columbia University

Verification Runtime Analysis: Get the Most Out of Partial Verification

Martin Ring¹; Fritjof Bornbebusch¹; Christoph Lüth^1,2; Robert Wille³; Rolf Drechsler^1,2

¹DFKI, ²University of Bremen, ³Johannes Kepler University Linz

Gap-free Processor Verification by S²QED and Property Generation

Keerthikumara Devarajegowda¹; Mohammad Rahmani Fadiheh²; Eshan Singh³; Clark Barrett³; Subhasish Mitra³; Wolfgang Ecker¹; Dominik Stoffel²; Wolfgang Kunz²

¹Infineon Technologies, ²TU Kaiserslautern, ³Stanford University

GANA: Graph Convolutional Network Based Automated Netlist Annotation
for Analog Circuits

Kishor Kunal¹; Tonmoy Dhar¹; Meghna Madhusudan¹; Jitesh Poojary¹; Arvind Sharma¹; Wenbin Xu²; Steven Burns³; Jiang Hu²; Ramesh Harjani¹; Sachin S. Sapatnekar¹

¹University of Minnesota, ²Texas A&M University, ³Intel Corporation

Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator

Brice Colombier; Nathalie Bochard; Florent Bernard; Lilian Bossuet

University of Lyon

GRAMARCH: A GPU-ReRAM based Heterogeneous Architecture
for Neural Image Segmentation

Biresh Kumar Joardar¹; Nitthilan Kannappan Jayakodi¹; Jana Doppa¹; Partha Pratim Pande¹; Hai (Helen) Li²; Krishnendu Chakrabarty³

¹Washington State University, ²Duke University/TUM-IAS, ³Duke University

PSB-RNN: A Processing-in-Memory Systolic Array Architecture
using Block Circulant Matrices for Recurrent Neural Networks

Nagadastagiri¹; Sahithi Rampalli¹; Makesh Tarun Chandran¹; Gurpreet Singh Kalsi²; John (Jack) Sampson¹; Sreenivas Subramoney²; Vijaykrishnan Narayanan¹

¹The Pennsylvania State University, ²Processor Architecture Research Lab, Intel Labs

A Learning-Based Thermal Simulation Framework
for Emerging Two-Phase Cooling Technologies

Zihao Yuan¹; Geoffrey Vaartstra²; Prachi Shukla¹; Zhengmao Lu²; Evelyn Wang²; Sherief Reda³; Ayse Coskun¹

¹Boston University, ²Massachusetts Institute of Technology, ³Brown University

ProxSim: Simulation Framework for Cross-Layer Approximate DNN Optimization

Cecilia De la Parra¹; Andre Guntoro¹; Akash Kumar²

¹Robert Bosch GmbH, ²TU Dresden

A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs

Ankita Nayak; Keyi Zhang; Raj Setaluri; Alex Carsello; Makai Mann; Stephen Richardson; Rick Bahr; Pat Hanrahan; Mark Horowitz; Priyanka Raina

Stanford University

Floating Random Walk Based Capacitance Solver for VLSI Structures
with Non-Stratified Dielectrics
Mingye Song; Ming Yang; Wenjian Yu

Tsinghua University

Ternary Compute-Enabled Memory based on Ferroelectric Transistors
for Accelerating Deep Neural Networks

Sandeep Krishna Thirumala; Shubham Jain; Sumeet Gupta; Anand Raghunathan

Purdue University

Impact of Magnetic Coupling and Density on STT-MRAM Performance

Lizhou Wu¹; Siddharth Rao²; Mottaqiallah Taouil¹; Erik Jan Marinissen²;
Gouri Sankar Kar²; Said Hamdioui¹

¹Delft University of Technology, ²IMEC

A Track

GenieHD: Efficient DNA Pattern Matching Accelerator Using Hyperdimensional Computing

Yeseong Kim; Mohsen Imani; Niema Moshiri;Tajana Rosing

University of California San Diego

Achieving Determinism in Adaptive AUTOSAR

Christian Menard¹; Andres Goens¹; Marten Lohstroh²; Jeronimo Castrillon¹

¹TU Dresden, ²University of California, Berkeley

A Flexible and Scalable NTT Hardware: Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography

Ahmet Can Mert¹; Emre Karabulut²; Erdinc Ozturk¹; Erkay Savas¹;
Michela Becchi²; Aydin Aysu^2
1Sabanci University, ²North Carolina State University

AntiDOte: Attention-based Dynamic Optimization for Neural Network Runtime Efficiency

Fuxun Yu¹; Chenchen Liu²; Di Wang³; Yanzhi Wang¹; Xiang Chen¹

¹George Mason University, ²University of Maryland, ³Microsoft

Go Unary: A Novel Synapse Coding and Mapping Scheme
for Reliable ReRAM-based Neuromorphic Computing

Chang Ma; Yanan Sun; Weikang Qian; Ziqi Meng; Rui Yang; Li Jiang

Shanghai Jiao Tong University

T Track

On Improving Fault Tolerance of Memristor Crossbar Based Neural Network Designs
by Target Sparsifying

Song Jin¹; Songwei Pei²; Yu Wang¹

¹North China Electric Power University,
²Beijing University of Posts and Telecommunications

Synthesis of Fault-Tolerant Reconfigurable Scan Networks

Sebastian Brandhofer; Michael Kochte; Hans-Joachim Wunderlich

University of Stuttgart

DEFCON: Generating and Detecting Failure-prone Instruction Sequences
via Stochastic Search

Ioannis Tsiokanos¹; Lev Mukhanov²; Giorgis Georgakoudis³;
Dimitrios S. Nikolopoulos⁴; Georgios Karakonstantis¹

¹Queen's University Belfast, ²QUB, ³Lawrence Livermore National Laboratory,
⁴Virginia Tech

Thermal-Cycling-aware Dynamic Reliability Management in Many-Core System-on-Chip

Mohammad-Hashem Haghbayan¹; Antonio Miele²; Zhuo Zou³;
Hannu Tenhunen¹; Juha Plosila¹

¹University of Turku, ²Politecnico di Milano,
³Nanjing University of Computer Science and Technology

E Track

Deeper Weight Pruning without Accuracy Loss in Deep Neural Networks

Byungmin Ahn; Taewhan Kim

Seoul National University

ACOUSTIC: Accelerating Convolutional Neural Networks
through Or-Unipolar Skipped Stochastic Computing

Wojciech Romaszkan; Tianmu Li; Tristan Melton; Sudhakar Pamarti; Puneet Gupta

University of California Los Angeles

Statistical Time-based Intrusion Detection in Embedded Systems

Nadir Carreon Rascon; Allison Gilbreath; Roman Lysecky

University of Arizona

Energy-efficient runtime resource management for adaptable multi-application mapping

Robert Khasanov; Jeronimo Castrillon

TU Dresden

CPS-oriented Modeling and Control of Traffic Signals Using Adaptive Back Pressure

Wanli Chang¹; Debayan Roy²; Shuai Zhao¹; Anuradha Annaswamy³; Samarjit Chakraborty²

¹University of York, ²Technical University of Munich,

³Massachusetts Institute of Technology