Keynote speech of Johanna Sepúlveda from Airbus Defence and Space, Munich, Germany

Bio of the speaker:

Johanna Sepúlveda received the M.Sc. and Ph.D. degrees in Electrical Engineering – Microelectronics by the University of São Paulo, Brazil. She was a Postdoctoral fellow at the Integrated Systems and Embedded Software group at the University of Sao Paulo (Brazil), at the group of Embedded Security of the University of South Brittany (France), at the Heterogeneous Systems group of the University of Lyon-INRIA (France) and at the Institute for Security in Information Technology at the Technical University of Munich (Germany). Since 2019, she holds a position as a Senior Scientist of Secure Communication at the CTO group of Airbus Defence and Space.

She has more than 13 years of experience in research in the area of embedded security and System-on-Chip (SoC) design for secure communications. It includes the design and implementation of innovative hardware architectures and software for protection against side-channel attacks, fault attacks and denial-of-service attacks. Her research interest in the area of post-quantum security includes the design, secure implementation and integration in a wide variety of cyber-physical platforms and critical infrastructures.

Title of the talk:

Security In the Quantum Era: Quantum-secure Solutions for Critical Infrastructures

Abstract of the talk:

The advent of quantum computers represents a threat for secure communications. In order to prepare for such an event, critical infrastructures must integrate quantum-secure capabilities. Quantum-Key-Distribution (QKD) and Post-Quantum Cryptography (PQC) promise to protect current and future systems against classical and quantum attacks. However, the efficient, safe and secure integration of such technologies is still a challenge. In this talk I discuss the requirements and constraints of the critical infrastructures, the opportunities and challenges of the adoption of such quantum-secure solution and the future of this area.

Felipe Valencia, Ilia Polian, and Francesco Regazzoni; Design time Assessment of Robustness against Physical Attacks
Apostolos Fournaris, Charis Dimopoylos, and Odysseas Koufopalvou; Creating Trusted Security Sensors for Anomaly Detection Systems using Hardware components

Ezinam Bertrand Talaki, Mathieu Bouvier Des Noes, Olivier Savry, and David Hely; Side-channel Leakage Assessment On RISC-V Architecture (15 mins)
Florian Unterstein, Tolga Sel, Thomas Zeschg, Nisha Jacob, Michael Tempelmeier, Michael Pehl, and Fabrizio De Santis; Secure Update of FPGA-based Secure Elements using Partial Reconfiguration (15 mins)

Talk from ITR Nanoelec team on "Industry's Perspective to Cybersecurity Issues"

Keynote speech of Falk Schellenberg from Ruhr University Bochum, Germany

Bio of the speaker:

Since 2020, Falk Schellenberg is associated with the Max-Planck-Institute for Cybersecurity and Privacy in Bochum, Germany, while at the same time being a post-doctoral researcher at the chair for Embedded Security, Ruhr University Bochum, Germany (since 2019). He received his Ph.D. degree in IT-Security in 2018, his M.Sc. degree in 2012, and his B.Sc. degree in 2010 from Ruhr University Bochum. His research interests include implementation attacks, i.e., fault injection and side-channel attacks, and protection against hardware Trojans.

Title of the talk:

On-chip Power Distribution Network as Unintentional Channel for Passive and Active Attacks

Abstract of the talk:

Highly-integrated SoCs as well as security-heterogeneous or potentially multi-tenant CPUs, FPGAs, or Cloud-architectures are arising. This led to various recent findings showcasing potential side-channel vulnerabilities where a tenant or process is able to spy on (or to influence) a victim residing on the same SoC, CPU, or Cloud-instance etc. Many of those attacks are caused security flaws in the logical isolation, e.g., cache attacks. Recently however, we have seen many attacks that exploit the underlying analog level as unintentional channel. Thus, and most importantly, such vulnerabilities are invisible and cannot be countered solely on the logical level. As with classical side-channel attacks, those attacks come in two flavors: a) passive attacks that spy on neighboring victims, and b) active attacks that cause faults in neighbor’s computation up to a complete denial-of-service. We will mainly cover both types of attacks on FPGAs, i.e., reaching from one part of the FPGA-fabric to another within the same system, even passing through logical isolation. In addition, we will briefly discuss creating covert channels in such scenarios and similar attacks on architectures beyond FPGAs, such as mixed-signal microcontrollers.

Zahra Kazemi, Cyril Bresch, Mahdi Fazeli, David Hely, and Vincent Beroulle; A Systematic Approach for Hardware Security Assessment of Secured IoT Applications (20 mins)
Osnat Keren and Ilia Polian; On Resilience of Security-oriented Error Detecting Architectures Against Power Analysis (20 mins)

Felipe Valencia, Ilia Polian, and Francesco Regazzoni; Design time Assessment of Robustness against Physical Attacks
Apostolos Fournaris, Charis Dimopoylos, and Odysseas Koufopalvou; Creating Trusted Security Sensors for Anomaly Detection Systems using Hardware components

Johannes Tobisch, Christian Zenger, and Christof Paar; Electromagnetic Enclosure PUF for Tamper Proofing Commodity Hardware and other Applications (20 mins)
Amir Alipour, David Hely, Vincent Beroulle, and Giorgio Di Natale; Power of Prediction: Advantages of Deep Learning Modeling as Replacement for Traditional PUF CRP Enrollment (20 mins)
Agamemnon Antoniadis, Nicolas Sklavos, and Elif Bilge Kavun; An Efficient Implementation of A Delay-Based PUF Construction (20 mins)

Junghee Lee and Wooil Kim; FlowGuard: Securing Design Flow to Prevent Hardware Trojan (20 mins)